Impact of Low k Dielectrics on Electromigration Reliability for Cu Interconnects
نویسندگان
چکیده
Multi-link statistical test structures were used to study the effect of low k dielectrics on EM reliability of Cu interconnects. Experiments were performed on dual-damascene Cu interconnects integrated with oxide, CVD low k, porous MSQ, and organic polymer ILD. The EM activation energy for Cu structures was found to be between 0.8 and 1.0 eV, indicating mass transport is dominated by diffusion at the Cu/SiNx cap-layer interface, independent of ILD. Compared with oxide, the decrease in lifetime and (jL)c observed for low-k structures can be attributed to less dielectric confinement in the low k structures. An effective modulus B obtained by finite element analysis was used to account for the dielectric confinement effect on EM. For all the ILDs studied, (jL)c showed no temperature dependence.
منابع مشابه
Impact of Joule Heating on Deep Sub-Micron Cu/low-k Interconnects
This paper investigates the impact of Joule heating on the scaling trends of advanced VLSI interconnects. It shows that the interconnect Joule heating can strongly affect the maximum operating temperature of the global wires which, in turn, will constrain the scaling of current density to mitigate electromigration and, thus, greatly degrade the expected speed improvement from the use of low-k d...
متن کاملReliability of TSV interconnects: Electromigration, thermal cycling, and impact on above metal level dielectric
0026-2714/$ see front matter 2012 Elsevier Ltd. A http://dx.doi.org/10.1016/j.microrel.2012.06.021 ⇑ Corresponding author at: STMicroelectronics, 8 Crolles, France. Tel.: +33 4 38 92 27 30. E-mail address: [email protected] (T. Frank). In this paper, reliability of Through Silicon via (TSV) interconnects is analyzed for two technologies. First part presents an exhaustive analysis of Cu TSV-la...
متن کاملImpact of Non-blocking Vias on Electromigration and Circuit-level Reliability Assessments of Cu Interconnects
In Cu metallization, refractory metal liners at vias generally block electromigration. As liner thicknesses are decreased, fully-blocking liners at vias become less certain due to liner ruptures. We have developed and exercised a reliability CAD tool, SysRel, for circuit-level interconnect reliability assessments, and used it to assess the impact of non-blocking vias on circuit-level reliabilit...
متن کاملInvestigation of the Fundamental Reliability Unit for Cu Dual-damascene Metallization
An investigation has been carried out to determine the fundamental reliability unit of copper dual-damascene metallization. Electromigration experiments have been carried out on straight via-to-via interconnects in the lower metal (M1) and the upper metal (M2), and in a simple interconnect tree structure consisting of straight via-to-via line with an extra via in the middle of the line (a “dott...
متن کامل